1. Field of the Disclosure
The subject disclosure relates to fabricating multiple electronics modules that integrate thin silicon die (e.g., bare die of any size) with thick and/or tall components on a substrate that can be processed on standard lithographic processing equipment. The subject technology also includes the electronics modules resulting from the fabrication methods disclosed herein.
2. Background of the Related Art
Miniaturization of electronic components has continually become more and more dense. Such multi-component modules are commonly referred to as integrated ultra-high density (i-UHD). Advances in the i-UHD manufacturing and packaging process are critical to each step forward in the technology. Several examples of i-UHD technology are disclosed in U.S. Pat. Nos.: 7,727,806; 7,960,247; 8,017,451; and 8,273,603. U.S. PG Publication No. 2012/0086135 is also directed to i-UHD technology.
One type of i-UHD manufacturing process uses substrates with mirrored cavities fabricated from silicon wafers. Use of lithographic processing equipment for the fabrication has been widely used and well understood in the art. Despite the longstanding use, several disadvantages remain. The process is expensive and results in fragile structures. The resulting image plane tends to be bowed resulting in difficulty utilizing lithography equipment (e.g., controlling line width), thus yield is undesirably low. Substrates with mirrored cavities have also been fabricated of alumina or ceramic as an alternative. Though stiffer and tending to bow to a lesser degree, this approach also suffers from many disadvantages including those noted above for silicon wafers.
Substrates with through cavities can also be fabricated of alumina and silicon. However, very high stresses develop in the die cavities due to encapsulate shrinkage upon cure. After cure, Coefficient of Thermal Expansion (CTE) mismatch between silicon die and encapsulant again results in bow or distortion or cracking of the material within the cavity. Additional known problems are the substrate bow that occurs during manufacturing and module bow after singulation.